Ada User Journal, 39(4), pp.296-299, December 2018
This paper describes how to enrich a System-on-Chip (SoC) design by flexible monitoring capabilities allowing to analyze the system’s execution for ensuring safety requirements. To this end, a general SoC architecture is described enriched by observation means. Moreover, it is described how verification properties expressed in a temporal stream-based specification language can be translated into a monitor expressed in a hardware description language (Verilog) checking the underlying property. Finally, the link between the SoC and the monitoring unit is explained. Overall, a self-observing system is obtained that works coherently with the SoC.
@article{Rufino18a,
author = "Rufino, Jos\'{e} and Casimiro, Ant\'{o}nio and Lange, Felix Dino and Leucker, MArtin and Scheffel, Torben and Schmitz, Malte and Thoma, Daniel",
title = "Non-intrusive Runtime Verification within a System-on-Chip",
journal = "Ada User Journal",
year = "2018",
abstractURL = "http://www.di.fc.ul.pt/~casim/papers/auj18-NIRV-SoC/auj18-NIRV-SoC.html",
documentURL = "http://www.di.fc.ul.pt/~casim/papers/auj18-NIRV-SoC/auj18-NIRV-SoC.pdf",
volume = "39",
number = "4",
pages = "296--299",
month = dec
}